The trend in VLSI technology has resulted in narrower interconnection lines and smaller contacts. Furthermore, integrated circuit designs are becoming more complex and denser. More devices are compressed in integrated circuits to improve performance. As a result, integrated circuits become more susceptible and vulnerable to ESD (electrostatic discharge) events causing the circuits to fail.
Static electricity exists on the surfaces of many materials. When bodies of materials with different potential come into contact, ESD will occur. ESD is generally defined as a sudden and momentary electric current that flows between two objects at different electrical potentials. An ESD circuit provides an ESD current path for an ESD current associated with an ESD event. In this way, an ESD circuit mitigates ESD current from entering circuitry associated with a device. ESD can damage devices fabricated on IC chips causing performance degradation or failures.
One of many considerations for IC design is on-chip ESD protection. Due to the ever-increasing requirements for higher speeds, smaller devices and product reliability, the significance of on-chip ESD protection is critical in IC design.